3-to-8 Line Decoder
Accepts a 3-bit binary input (A2 A1 A0) and drives exactly one of 8 outputs HIGH. Implements IC 74HC138. Internally uses 3 NOT gates + 8 three-input AND gates.
3-to-8 Decoder — IC 74HC138
A = 000 (0)
Y0 is HIGH
Truth Table
| A2 | A1 | A0 | Dec | Active |
|---|---|---|---|---|
| 0 | 0 | 0 | 0 | Y0 |
| 0 | 0 | 1 | 1 | Y1 |
| 0 | 1 | 0 | 2 | Y2 |
| 0 | 1 | 1 | 3 | Y3 |
| 1 | 0 | 0 | 4 | Y4 |
| 1 | 0 | 1 | 5 | Y5 |
| 1 | 1 | 0 | 6 | Y6 |
| 1 | 1 | 1 | 7 | Y7 |
Yn = Ā2ᵃ·Ā1ᵇ·Ā0ᶜ
Each output is a product of the input variables or their complements. Only the minterm matching the binary input = 1.
Applications
Memory address decoding, chip select logic, 1-of-N selection, BCD-to-decimal, display segment driving.
Decoder vs DEMUX
A DEMUX routes a data signal to one output. A decoder always outputs logic-1 on the selected line (Enable must = 1).